Anti ASIC miner

1. It is
CPU – GPU – FPGA – ASIC – mine pool. This is the development history of mining machinery instry
I hope I can help you!

2. Video card miner

3. GPU is the meaning of graph line processor, the original design intention is to do graphics computing. GPU chip is essentially a collection of many small CPUs for image processing. Of course, each CPU can also do general operations such as addition, subtraction, multiplication, division or non shift jump, so it can also be used for mining. When GPU is mining, it wastes less chip area and power consumption than CPU, so mining efficiency is higher than CPU
What about ASIC? It is a more optimized circuit than the CPU mentioned above. There is no specific definition, but there is a rule in the field of chip design: the more general computing platform, the less efficient it is to complete specific computing. ASIC is the most dedicated computing platform. If we understand this, we can come to such a basic conclusion: in the mining field, if we use the computing power proof mechanism, as long as the CPU can dig, ASIC can dig. No matter what algorithm is used, ASIC can dig. There is no reason that CPU can dig, but ASIC can't, So the biggest difference between GPU and ASIC is their specific computing power.

4. A card has high computing power. The computing power of rx480 after brushing the BIOS is equal to that of gtx1070, and the price is cheap

5. Wait; The Avalon ordered in October last year has not been received yet; Now we have to order three. Four months to get it.

6.

The main differences between 7Nm and 10nm are as follows:

1, gate length is different. The width of the gate formed on the CPU is also called the gate length. The 7Nm process can integrate more transistors into CPU and GPU, and make the processor have more functions and higher performance

2. Different power consumption. For 7Nm technology and 10nm technology, the volume of 7Nm will be smaller when the same number of transistors are plugged. The large volume of 10nm, because of the process problems, will lead to the larger capacitance of the original, the required voltage is higher than 7Nm, resulting in higher overall power consumption

performance:

the chip is composed of transistors. The smaller the process, the more transistors in the same area of the chip, and the stronger the natural performance. The performance of 7Nm is better than that of 10nm

take Huawei Qilin 980 as Qilin 970, where Qilin 980 is a chip with 7Nm process and Qilin 970 is a chip with 10nm process

first look at the number of transistors, Kirin 980 has 6.9 billion transistors, Kirin 970 has 5.5 billion transistors, an increase of about 25.5%. In terms of performance, it's not as simple as 25.5%, because it involves not only the number of transistors, but also the upgrade of CPU, GPU, NPU and other IP cores

in terms of specific values, for example, the running points of CPU, Qilin 980, GPU and NPU are about 50% higher, twice as high

extended data:

integrated circuits have two main advantages for discrete transistors: cost and performance. The low cost is e to the fact that the chip prints all the components as a unit through photolithography, rather than making only one transistor at a time. The high performance is e to the fast switching of components, which consumes less energy, because the components are small and close to each other. In 2006, the chip area ranged from a few square millimeters to 350 mm, with a million transistors per mm

7. In my opinion, if it reaches 10nm, the movement of the electron will have a great impact on the normal operation, which will greatly affect the yield of the proct. As far as I know, there is no good process to solve this kind of problem. Therefore, in the short run, it is better to consider expanding to three dimensions than to increase the plane density. It may be a practical method to forget the multi stack scheme proposed by which company in the front-end time.

8. New capital, Baifu, Liandi, new world

9. The concept of x16r can be extended to include script, equihash and other ASIC resistant algorithms to continue to allow anyone with idle computers to participate in mining using off the shelf hardware. The order of the algorithm can be easily changed for each token to prevent hardware manufacturers from developing ASIC mining machines.